M5 Power Module
M5 Power Module, M5 Power Module

CSR Memory Map

In normal operation the device implements a CSR type memory mapped data space. The VideoRay CSR comms protocol is used for communication. See https://github.com/videoray/VRCommsProtocol_doc/raw/master/VR_CSR_Communication_Protocol.doc for more information on the base binary protocol.

RegisterFunctionComments
0x0float rpm_targetrpm (RW) NOT USED YET
0x4float pwr_target-1 to 1 (RW)
0x8float rpmrpm (R)
0xcfloat bus_vvolts (R)
0x10float bus_iamps (R)
0x14uint32_t faultfault flags (R)
0x18float tempdeg C (R)
0x1cfloat pwr_actual-1 to 1 (R)
0x20float rpm_P0 to 1 (R) NOT USED YET
0x24float rpm_I0 to 1 (R) NOT USED YET
0x28float rpm_D0 to 1 (R) NOT USED YET
0x2cRESERVED
0x4cuint16_t thruster_IDordinal (RW)
0x4eRESERVED
0x50uint8_t operation_flags
0x51RESERVED
0x54uint32_t motor_fault_interlockpassword (RW)
0x58RESERVED
0x60uint8_t motor_control_flagsBitfield (RW)
0x61uint8_t polescount (RW)
0x62uint8_t pwm_deadbandticks (RW)
0x63RESERVED
0x64float commutation_threshold0 to 1 (RW)
0x68uint32_t commutation_loss_timeoutms (RW)
0x6cfloat startup_dutycycle0 to 1 (RW)
0x70uint16_t startup_initial_rpmrpm (RW)
0x72uint16_t startup_final_rpmrpm (RW)
0x74float startup_durationmS (RW)
0x78float deadband_neg-1 to 0 (RW)
0x7cfloat deadband_pos0 to 1 (RW)
0x80float limit_neg-1 to 0 (RW)
0x84float limit_pos0 to 1 (RW)
0x88float slew_rate_updelta/mS (RW)
0x8cfloat slew_rate_downdelta/mS (RW)
0x90float rpm_kP-1 to 1 (RW) NOT USED YET
0x94float rpm_kI-1 to 1 (RW) NOT USED YET
0x98float rpm_kD-1 to 1 (RW) NOT USED YET
0x9cRESERVED
0xa4uint8_t fault_controlflag (RW)
0xa5uint8_t undervoltage_triggervolts (RW)
0xa6uint8_t overvoltage_triggervolts (RW)
0xa7uint8_t overcurrent_triggeramps (RW)
0xa8uint8_t temp_triggerdeg C (RW)
0xa9uint8_t stall_count_maxcount (RW)
0xaaRESERVED
0xacuint32_t undervoltage_err_cntcount (R)
0xb0uint32_t overvoltage_err_cntcount (R)
0xb4uint32_t overcurrent_err_cntcount (R)
0xb8uint32_t temp_err_cntcount (R)
0xbcuint32_t stall_err_cntcount (R)
0xc0RESERVED
0xd8uint32_t comms_sync1_err_cntcount (R)
0xdcuint32_t comms_sync2_err_cntcount (R)
0xe0uint32_t comms_headerxsum_err_cntcount (R)
0xe4uint32_t comms_overrun_err_cntcount (R)
0xe8uint32_t comms_payloadxsum_err_cntcount (R)
0xecuint16_t comms_err_flag
0xeeuint16_t save_settingscode (W)
0xf0uint32_t custom_command(W) Special Register
0xf4uint32_t FACTORY_SERVICE_DATA(R) Device specific service data
0xf8uint16_t CONFIG_DATA_SIZE(R)
0xfauint8_t CONFIG_DATA(R) Special Register
0xfbuint8_t FIRMWARE_VERSION(R) Special Register
0xfcuint8_t NODE_ID(RW) Special Register
0xfduint8_t GROUP_ID(RW) Special Register
0xfeuint16_t UTILITY(W) Special Register

Document Path: M5 Power Module Operator's Manual > Software Guide > Programming > CSR Memory Map